1. Field of the Invention
The present invention relates to a method of manufacturing semiconductor monocrystalline mirror-surface wafers having a high degree of flatness which method includes a gas phase etching process, and more particularly to a method of manufacturing semiconductor silicon mirror-surface wafers, and to semiconductor monocrystalline mirror-surface wafers having a high degree of flatness manufactured by this method.
2. Description of the Related Art
As shown by the process flow chart in FIG. 6, a conventional method of manufacturing semiconductor silicon mirror-surface wafers has generally comprised a slicing process A in which a monocrystalline ingot produced with a monocrystalline production apparatus is sliced so as to obtain thin disk-like wafers; a chamfering process B in which the peripheral edges are chamfered so as to prevent generation of cracks and defects in the wafer obtained in the process A; a lapping process C in which the chamfered wafer is lapped so as to have a flat surface; an etching process D in which the working damage remaining in the chamfered and lapped wafer surface is eliminated; a primary mirror-surface polishing process E in which the surface of the etched wafer is coarsely polished, a finishing mirror-surface polishing process F in which the surface of the wafer which has been subjected to the primary mirror-surface polishing is subjected to finishing mirror-surface polishing; and a final cleaning process G in which the wafer which has been subjected to finishing mirror-surface polishing is cleaned so that the polishing material and foreign matter attached to the wafer is removed.
In some cases, the mirror-surface polishing process involves three stages of polishing; namely a primary polishing, a secondary polishing, and a finishing polishing, or even more stages, so as to provide good flatness and surface roughness.
Furthermore, in those cases where wafers are produced from an ingot of semiconductor silicon manufactured according to the Czochralski method, a donor-annihilation heat treatment for eliminating the effect of resident oxygen donors is generally carried out before the mirror-surface polishing process; for example, immediately after the etching process D.
However, the above-described conventional method of manufacturing semiconductor mirror-surface wafers involves many processes and is complicated; moreover, even though the production cost is therefore high, the conventional method is still unable to provide the exacting degree of flatness demanded by the higher degrees of integration of recent leading semiconductor devices.
Thus, research and development of various techniques has continued, with a view of increasing the degree of integration of future semiconductor devices and increasing the diameter and improving the flatness of wafers.
Among them, a particularly important technique known as PACE (plasma assisted chemical etching) has been developed recently (for example, see Japanese Patent Application Laid-Open (kokai) Nos. 5-160074, 6-5571, and 7-288249).
In this method, the thickness of a wafer is made uniform through gas phase etching. The amount of material removed by plasma etching is controlled through measuring the thickness distribution of the wafer and then controlling the speed of the nozzle which scans over the wafer in accordance with the thus measured distribution. By this means, the wafer thickness is rendered uniform and the wafer is rendered very flat.
If the PACE process is inserted after the finishing mirror-surface polishing process F of the conventional method of manufacturing semiconductor monocrystalline silicon mirror-surface wafers shown in FIG. 6, the degree of flatness of the wafer (TTV, total thickness variation; i.e., the difference between the maximum thickness and the minimum thickness over the entire surface of a wafer), can be markedly improved (see FIG. 5B) as compared with the case of the conventional method (see FIG. 5A). Hence, a satisfactorily high degree of flatness required for future semiconductor mirror-surface wafers can be obtained through this method.
However, although the aforementioned PACE technique greatly improves wafer flatness, a new roughness with a periodicity of about 0.01-5 .mu.m, known as haze, is inevitably produced on the surface since the wafer is exposed to high energy plasma, and the surface roughness which has been improved by the finishing mirror-surface polishing is inevitably affected adversely. Thus, in order for this haze to be removed, a special polishing known as "touch polishing" must be performed so as to remove the material in a thickness of about 10 nm.
Furthermore, PACE is liable to introduce damage and defects in the wafer surface, and a further process such as a polishing, etching, or heat treatment must be performed in order to remove such damage and defects after the PACE treatment.